Why do most semiconductor markets have ~3 main companies? … give or take, depending on the market. For example:
EDA: Synopsys, Cadence, Siemens
Memory: Samsung, SK Hynix, Micron
Leading-edge foundry: TSMC, Samsung, Intel
GPU: Nvidia, AMD
CPU: Intel, AMD, Arm
AECs: Credo, Marvell, Astera
Scale-up interconnect: NVLink, UALink, ESUN
Litho: ASML alone at EUV, only ASML and Nikon at immersion
Fixed costs are the main driver. The buy-in to compete in nearly all semiconductor markets is large and rises every generation. This isn’t SaaS! Interestingly, model lab dynamics look similar; the costs to play the game are enormous and rising every generation.
Take leading-edge foundry as an illustration. Chip companies used to own their fabs. But the cost of a leading-edge fab never stops rising... $100M, then $1B, then $10B:
Only companies with serious volume can amortize that.
Most chip companies didn’t sell enough chips to keep a fab running at full capacity. So each generation, more of them sold off their fabs. That’s where the fabless design industry and merchant foundries came from.
So the number of players in leading-edge fabs keeps falling because the market share needed to break even keeps rising. We can turn that into a rough rule. Take the market size and divide it by the revenue one player needs to break even, and that gives us how many players the market can support. As a first-order toy model…
N ≈ market size / breakeven scale
Let’s do some napkin math as an illustration. We can approximate the size of the leading-edge foundry market; TSMC did $122B in revenue in 2025, and 74% of that was from “advanced nodes” of 7nm and below (call it ~$90B), so if TSMC has 90%+ of that market, we can call the market $100B+. Then let’s say a single sub-2nm fab is ~$20B-$30B. A $100B+ annual market with a $20-$30B buy-in supports about three players? Seems reasonable. Of course if the market share is even 60%, 25%, 15%, you’re looking at less revenue in a year than the cost of a single fab…
Yes, you amortize a fab and don’t pay for the whole thing up front; TSMC depreciates equipment over five years, so a $20B-30B fab is roughly $6B a year of cost. So that’s how one company can build and own many fabs at once. But the CapEx treadmill never stops; you’re building the next fab while depreciating the last one, hence the $41B of annual CapEx. And that doesn’t account for R&D costs. Staying on the roadmap cost TSMC $41B of CapEx plus about $8B of R&D in 2025. And I think they could spend even more.
We can visualize the break-even volume for a credible program at each node, meaning a fab or two of capacity plus the process R&D to stay on the roadmap. At 2nm that’s roughly two $28B fabs depreciating plus a few billion a year of R&D, call it ~$14B a year of fixed cost:
Look at the hypothetical 2nm break-even of ~97K wafer starts per month, nearly 1.2M wafers a year. That’s an entire gigafab worth of demand (TSMC’s own term for a 100K wspm site), running essentially full, all year, just to pay for the program.
Of course, fabs don’t start at that kind of volume. A new fab ramps for months at lower wafer starts while yield matures. So the buy-in isn’t just the fab. It’s the fab plus the underutilized ramp, losing money on every wafer until volume and yield catch up.
So why do most semiconductor markets hold ~3 main players?
Why not fewer?
Why not more?
Do growing markets allow more entrants?
And sure, foundry has the highest fixed costs so it’s a great illustration, but why does this extend to other markets?