An Interview with Rivian’s Mukund Chavan About RAP1
Rivian designed its own autonomy SoC. Why?
I am happy to welcome Mukund Chavan, VP of ASIC Design at Rivian, to discuss the Rivian Autonomy Processor (RAP-1). This is the custom silicon chip Rivian announced at its Autonomy and AI Day back in December.
Rivian designing its own chip was a genuine surprise. The company built its own zonal ECU architecture, so electronics has been a core competency, but custom silicon is a different level of ambition.
We start the interview by building up an understanding of the autonomy workload. What does it actually mean to do multimodal inference at the edge, when you have 11 cameras, radar, and lidar all streaming into a chip that has to make driving decisions in a 100-millisecond loop?
From there we get into RAP1 itself, including the custom neural network engine, the safety architecture, and a chip-to-chip interconnect called RivLink that hints at ambitions beyond autonomous vehicles. We discuss build vs. buy decisions, like why Rivian designed its own neural network engine and interconnect but licensed Arm cores. And a very interesting discussion about how silicon economics drove the 800 TOPS compute target.
Finally, we get to the heart of the matter. Why custom silicon over merchant? How does vertical integration unlock optimizations you simply can’t get off the shelf?
We close with the team and timeline, about 2.5 years from project go to silicon in hand. This was fun and educational. Enjoy!
This interview is lightly edited for clarity. Transcript is available for paid subscribers who prefer to read vs watch.